CERN LEP & SPS

linear wire-scanners

-

electronics:

short description and

installation guide-line

 

 

 

 

 

J.Koopman

 

july 1995

 

 

 

 

 

 

 

 

 

 

copies:     J. Camas

G. Ferioli

J.-J. Gras

R. Jung

M. Silanoli


 

system description:

 

Annex 1 shows a schematic overview of the wirescanner system. A complete system can control upto four wire-scanners at a time. It consists of three distinct hardware parts. First there is a VME-crate that is tied up to the communications network with the processor, 2 acquisition cards and 4 control cards. This crate is connected to the power-crate that contains 2 motor power-supplies and 4 driver cards. The power-crate on it's turn is connected to the wire scanners themselves and their nearby interfaces via long cables (max. 250 meters).

 

1 acquisition card features:

 

copes with the detectors for 2 wirescanners (normally H+V).

2 PM inputs and 2 SEM inputs.

2 peak detectors.

one 12-bit ADC with multiplexer.

64k*16 bits memory.

an acquisition counter (max. 64k).

timing cicuit to synchronise the acquisition on the bunch passage.

quadruple 8-bit DAC and ADC to control and read the HV power-supplies for PM's.

test input signal.

status.

 

1 control card features:

 

controls 1 driver card.

EPROM function generator to position the wire.

possibility to program 16 different functions.

programmable speed.

acquisition gate generator.

12-bits ADC and 16-bits counter to acquire position of scanner wiht a potentiometer and an optical                 ruler.

2*4k 16bits memory.

status.

 

1 driver card features:

 

1000W peak power amplifier with over-current and over-temperature protection.

motor servo loop with potentiometre for position.

remote power supply + sense for potentiometer of scanner.

securities: time-outs, power-fails, safety-switch controls, auto-reset.

wire continuity test.

status.

 

1 bws-test card features:

 

allows testing of acquisition electronics (PM/SEM and position) without wirescanner and/or machine             FR.

possibility of reshaping external FR input signal.

generation of FR signal with adjustable repetion rate and duration, if no machine FR available.

output of triangularly modulated pulsetrain with variable slopes and timing to simulate a PM or SEM

                signal, triggered by an externaly or locally generated - for on-board test purposes -              acquisition gate.

makes timing signals of acquisition card available on frontpanel.

 

 


system performances:

 

max. scanner speed: 1 m/s with 250m cable.

wire vibration < +- 2um ( with carbon wire diameter: 33 um).

scanner stroke : 132mm.

resolution of optical ruler: 4 um.

resolution of potentiometre/ADC: ~ 50 um.

precision of optical ruler: +- 10 um.

precision of potentiometre: ~ 200 um.

 

 

input characteristics:

 

PM inputs:

                0 to  -5V, 2 kohm.

SEM-inputs:

                0 to -5V, 50 ohm.

                gain 1,2,4,8.

FR-input:

                10 to 50 kHz, 1 us, 5 to 0V transition.

 

 

 

installation:

 

connect the cables as shown in annex 2.

 

scanner part:

 

set the jumpers on the control card as shown in annex 3.

make sure that the function generator EPROM is called BWSMAL. This is a 0 to 7V function, for the type of wirescanner without brakes.

to begin with, set potsenseA=+1V and potsenseB at -8V. this procures a good safety margin before fine adjusting the stroke of the wire. fine adjusting is done on the spot doing several scans. the minimum margin to be respected depends on the speed of the wirescanner, which determines the overshoot on the stroke of the wire.

initialise the control part with the program.

set speed, max. 1m/s.

 

acquisition part:

 

position:

 

set the acquisition gate so that the beam together with the reference of the optical ruler will be acquired. (max. number of acquisitions is 64k. it depends on the scan speed and the number of acquisitions per machine turn (max. 16) which maximum gatelength you can choose).

check functioning of ruler by doing a scan. check the acquired data for the sign change.

 

detectors:

 

set jumpers of acquisition card according annex 4.

be sure that the FR signal is present.

if working in single bunch mode, check timing bunch selector with beam (both PM signal and timing signal - G1 and/or G2 - on scope).

initialise acquisition card with the program.

set mpx (1=SEM 1 +  SEM2; 2=PM1 + PM2; 3=PM1 + PM1; 4=PM2 + PM2).

if SEM is used, set gain ( 1:*1; 2:*2; 3:*4; 4:*8).

if HVsupply integrated in crate use program to set HV for PM's.


Some notes:

 

The spacing between the bunches (96 ns) is too tight to be differentiated by the hardware. Therefore an integrating filter has to be foreseen on the PM and SEM inputs with T ~ 10 us. We might be able to distinguish the very first bunch, since there is a gap of 1 us before it, but we would need fine adjustment of the FR-timing (with delay cables), since the timing-resolution is 62.9 ns for FR=47.3 kHz. I propose that we will concentrate, in a first approach, on the integrated signals.

 

The program to control the wirescanner is called 'bwsctl', mainly written by Jean-Jacques. The one that controls the high voltage for the PM's is called 'hv', written by me. Jean-Jacques will send you the software by e-mail. As far as the functionning of the program is not self explaining, please contact one of us. The addresses of the hardware functions are given in annex 5 to 7.

 

The HV power supplies, that can be integrated in the chassis (upto a maximum of four), are the 'NCE3000-10neg.' of HEINZINGER. The HV coaxial connector that should be mounted on the output cable of this power supply  is the '11SHV 50-2-1C' of SUHNER.